Luke Wren’s RISCBoy: A Hand-Built RISC-V Games Console That Reaches for Silicon

Engineer Luke Wren created RISCBoy, a complete open-source RISC-V portable games console with custom CPU, graphics and PCB. The project moved from iCE40 FPGA to a GF180MCU tapeout on wafer.space in late 2025. It stands as a detailed homage to 2000s handhelds executed with modern tools. Wren's transparent approach invites the community to study and extend the design.
Luke Wren’s RISCBoy: A Hand-Built RISC-V Games Console That Reaches for Silicon
Written by Emma Rogers

Luke Wren builds things from the ground up. The Raspberry Pi engineer didn’t tweak existing hardware for his latest project. He created a complete portable games console in open source, complete with his own RISC-V processor, graphics pipeline, circuit board and supporting software.

The result is RISCBoy. Wren describes it as “a Gameboy Advance from a parallel universe where RISC-V existed in 2001.” That line captures the spirit. It’s a love letter to the handheld consoles from his childhood. GitHub – Wren6991/RISCBoy

Short. Direct. And surprisingly complete.

The original RISCBoy targets a Lattice iCE40-HX8K FPGA. That part contains 7680 LUT4 elements. Wren wrote the design in Verilog 2005. The CPU supports RV32IMC. It passes official RISC-V compliance tests along with formal verification checks. The graphics side delivers a raster pipeline suited for 2D games with sprites and backgrounds reminiscent of early 2000s portables.

But Wren didn’t stop at the FPGA version. Last November he grabbed a spot on wafer.space’s first multi-project wafer shuttle. In two weeks he expanded the design into a full system-on-chip for the GF180MCU process. The new repository, GitHub – Wren6991/RISCBoy-180, shows the rapid work. “RISCBoy 180 is a two-week project to flesh out RISCBoy into a fully functioning games console on a chip, and tape it out on GF180MCU on the first wafer.space shuttle,” Wren posted on X.

He added later that the audio processing unit uses RV32EMBZcaZcb for now. SRAM controller integration proved tricky. IO routing and timing looked challenging too. He aimed for a fast parallel bus using nearly all pads on three sides of the die. From FPGA prototype to actual silicon tapeout in months.

The project stands apart because Wren owns every layer. The Hazard5 core forms the heart of the CPU. Custom bus fabric connects it to memory and peripherals. The graphics block handles rasterization duties. Even the PCB design for the 5-by-5-centimeter prototype board lives in the repo, done in KiCad for four-layer boards that cost about $65 for 10 pieces.

Software support matches the hardware effort. Wren provides instructions to build a RISC-V toolchain. Simulation uses Icarus Verilog or ISIM with provided Makefiles. Test suites verify both the processor and full system. Demo code and games can run on the hardware or in simulation. Documentation folders detail the architecture. One note calls the whole effort “CPU, graphics, PCB, and the kitchen sink.”

Interest surfaced quickly. A Hacker News thread appeared the same day the project gained fresh attention in July 2026. Comments praised the from-scratch approach. Some wondered about game demos and clock speed differences between the 36 MHz GF180MCU version and faster RP2350 implementations. Wren’s own X posts drew replies from hardware enthusiasts eager to see silicon results.

This isn’t Wren’s first hardware adventure. He previously shared design files for PicoStation 3D, another games console effort pairing a Raspberry Pi RP2040 microcontroller with a Lattice iCE40 UP5k FPGA. That board included 8MB of HyperRAM, HDMI output, audio, microSD storage and SNES controller ports. Wren called it “an unfinished, untested project” at the time. “I’ve laid out a first iteration… questionable decisions… so you shouldn’t copy… but I’m posting this anyway because it might inspire somebody… more important than me being embarrassed,” he wrote, according to a Hackster.io article. The PicoStation work clearly informed RISCBoy’s 3D ambitions and FPGA-microcontroller thinking.

Yet RISCBoy goes further. The FPGA version already runs real code. The GF180MCU tapeout pushes the design into a true ASIC. Wafer.space gave Wren a free slot. He credits the company for the opportunity and notes he acted as “a pipe cleaner to find issues with the flow, example project template, SRAM models etc.” The experience taught him plenty. “I didn’t take any other payment,” he added in the RISCBoy-180 README.

Performance details remain sparse so far. The original FPGA design runs at modest clocks suited to the iCE40. The 180nm GF180MCU version targets lower frequencies than modern 40nm parts like the RP2350’s Hazard3 core. One observer on X asked whether the process node explained a potential 4x slowdown. Wren has not published benchmark numbers yet. Bring-up on the physical chips will answer those questions.

Still, the technical achievement stands. Wren implemented a complete raster graphics pipeline in hardware. He wrote the memory controller, peripheral bus and display logic. The system boots, runs code and produces graphics without relying on off-the-shelf IP blocks for the core functions. That level of vertical integration rarely appears in hobby projects.

Open-source hardware at this depth changes expectations. Anyone can clone the repo with submodules, run synthesis through Yosys, nextpnr and Project Icestorm, generate a bitstream and load it onto an iCE40 board. Or study the ASIC version and learn from the tapeout files. The Apache 2.0 license on the newer repo encourages reuse.

Wren works at Raspberry Pi by day. His personal projects show a different side. He calls himself a “cursed computer architecture enthusiast” on X. The RISCBoy series reflects that. It mixes nostalgia with rigorous engineering. Childhood Game Boy Advance memories meet modern RISC-V and open-source ASIC flows.

Results from the wafer.space shuttle have not been reported yet. When the chips return, Wren will face the real test of power, speed and bugs. Early posts suggest he expects challenges with IO timing. But the community already watches closely. Recent X discussions mention audio pipeline work and Forth operating system experiments on similar RISC-V FPGA systems.

The project continues to evolve. New commits appear in both repositories. Wren shares progress in real time. For hardware engineers and console fans, RISCBoy offers something rare. A fully documented, from-scratch portable games machine that exists today on FPGA and soon in silicon. No black boxes. No NDAs. Just code, schematics and a clear passion for the craft.

That alone makes it worth attention. Wren built the console he wanted as a kid. Now others can build on his work.

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