He Tingbo stepped back into the spotlight last month after seven years largely out of public view. The president of Huawei’s semiconductor business, long called the company’s “chip queen” in China, delivered a keynote at the IEEE International Symposium on Circuits and Systems in Shanghai. She laid out the Tau Scaling Law. And she presented LogicFolding, the architecture designed to make it real.
Simple idea at its core. Stop measuring progress by how small transistors get. Start measuring by how fast signals move through the system. Tau, the Greek letter that stands for that propagation delay, becomes the new yardstick. Huawei says this shift lets it reach transistor densities equivalent to 1.4-nanometer processes by 2031. All without extreme ultraviolet lithography machines that U.S. sanctions keep out of reach. (Huawei Official Announcement)
The claim lands with force. Over the past six years Huawei has designed and mass-produced 381 chips based on this principle. They serve phones, AI accelerators, and other markets. The first major test comes this fall. Kirin processors scheduled for launch will incorporate LogicFolding. Performance gains should follow. By some internal metrics the approach already delivers a 53.5 percent jump in transistor density at the same process node, pushing from roughly 155 million to 238 million transistors per square millimeter. (The Next Web)
LogicFolding does more than stack dies. It redesigns the circuit layout from the ground up. Traditional two-dimensional grids give way to vertical structures that shorten critical signal paths. Resistive and capacitive loads drop. Transistor density rises. At the device level engineers optimize resistance and parasitic capacitance. At the circuit level LogicFolding breaks old physical boundaries. Chip-level work coordinates software, architecture, and silicon for better parallelism. System-level changes introduce UnifiedBus, a fabric that cuts data transit time dramatically. One analysis puts that reduction at 500-fold in certain configurations. (Futurum Group)
The Physics Behind the Shift
Moore’s Law ran on geometric scaling for decades. Smaller transistors. More of them. Cheaper per function. Physical limits and exploding costs have slowed that engine. Economic returns diminished. Huawei faced an added constraint. Sanctions blocked access to leading foundries and the most advanced tools.
So the company reframed the problem. Focus on time. Compress signal propagation delay across every layer of the stack. The result looks like three years of traditional node progress achieved at a fixed manufacturing process. Clock speeds on the upcoming Kirin reportedly climb back to competitive levels around 3.1 GHz. Power efficiency in performance cores improves by 41 percent in some tests. These numbers come from Huawei’s own data and early teardowns. Skeptics point out that some density gains come from using more silicon area overall. Not pure process magic. Still, the predictability of gains tied to tau reduction gives the approach its “law” status. (Wired)
He Tingbo drew inspiration from an ancient engineering marvel. The Dujiangyan irrigation system in Sichuan, built more than 2,000 years ago without modern machines. Sanctions became just another set of constraints to solve. In 2019 she had written an internal letter outlining a “spare tires” strategy. Backup plans prepared long before the U.S. crackdown intensified. That preparation showed results in the 2023 Mate 60 Pro. Its Kirin 9000s chip achieved 5G capability on SMIC’s 7-nanometer process using deep ultraviolet tools pushed to their limit.
Huawei’s founder Ren Zhengfei struck a calm tone. “There is actually no need to worry about the chip issue,” he told People’s Daily. Stacking and clustering can deliver performance comparable to the state of the art. Rotating chairman Xu Zhijun went further. He expressed a backhanded gratitude. The U.S. pressure forced China to build a stronger domestic semiconductor chain. (The Next Web)
Industry watchers offer mixed views. Nvidia CEO Jensen Huang called LogicFolding a breakthrough for Huawei but downplayed any immediate threat. He noted that TSMC and Taiwan have pursued similar packaging technologies for a decade. Analyst Brendan Burke at Futurum Group sees the pitch as coherent. Huawei’s 1.5-micron LogicFolding pitch in production delivers real density without new nodes. Yet he flags serious risks. Toolchain maturity lags. Inter-wafer process variation poses yield problems. Geopolitical fragmentation limits the ecosystem. Heat density can spike five to ten times when multiple active layers fold together. China’s domestic electronic design automation tools race to catch up. (Futurum Group)
Recent coverage adds detail. A June analysis highlighted that the Kirin 2026 achieves these gains while maintaining thermal and yield considerations through careful layer management. Huawei published technical documents in mid-June demonstrating predictable performance increases on the new mobile SoC. Independent tests are still limited. But the volume of chips already produced under the framework suggests the approach scales beyond a single demonstration. (Semicon Alpha on Substack)
The broader stakes reach beyond one company. Huawei projects it will hold 62 percent of China’s domestic AI accelerator market in 2026. Its Ascend series follows a clear roadmap. Ascend 950 arrives later this year. Successive generations follow in 2027 and 2028. Nvidia’s share of China’s high-end AI chip market fell from 95 percent to near zero after export curbs. Beijing pours resources into homegrown alternatives. Washington tightens controls on advanced tools. The chip war settles into a long contest of adaptation and iteration.
He Tingbo ended her presentation on a collaborative note. “We believe that openness and collaboration are key to driving ongoing progress in the semiconductor industry. No single company can independently find all the answers.” She invited scientists, engineers, and partners worldwide to build on the Tau framework. Whether the invitation finds many takers remains uncertain. Geopolitics narrows the circle of trust.
Still, the message resonates. When traditional paths close, engineers find new ones. Huawei bet six years ago that time, architecture, and system-level thinking could substitute for forbidden equipment. Early data from hundreds of chips and the imminent Kirin launch will test that wager. The results could influence strategies far outside Shenzhen. TSMC, Intel, and their customers watch closely. So does the global supply chain already stretched by export rules and national priorities.
One thing looks clear. The era of simple geometric shrinks giving easy gains has passed. Companies that master signal timing, vertical integration, and full-stack optimization stand to gain ground. Huawei just drew a map. Others must decide whether to follow its route or chart their own.
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