Advanced Micro Devices is preparing to launch what may be its most aggressive assault yet on Intel’s long-held dominance in telecommunications infrastructure. The company’s forthcoming EPYC “Sorano” processor, armed with up to 84 Zen 5 cores and purpose-built for network-edge workloads, signals that AMD is no longer content to compete on the margins of the telecom equipment market — it wants to own the center of it.
The Sorano family, which surfaced in recent technical disclosures and industry reporting, represents AMD’s first dedicated push into the telecommunications-optimized server processor segment. Unlike the company’s general-purpose EPYC data center chips, Sorano is designed from the ground up to handle the specific demands of 5G base stations, virtual radio access networks (vRAN), and mobile edge computing platforms. According to TechRadar, the top-end Sorano SKU will pack 84 Zen 5 cores into a single socket — a substantial increase over anything AMD has previously offered for this class of workload.
A Processor Built for the Demands of Modern Wireless Networks
The telecom infrastructure market has been undergoing a significant transformation over the past several years, driven by the global rollout of 5G and the industry’s shift toward software-defined networking. Traditionally, wireless base stations and network functions relied on specialized, proprietary hardware. But the movement toward Open RAN — an architecture that disaggregates hardware from software — has opened the door for general-purpose processors from companies like Intel and AMD to replace custom silicon in network equipment.
Intel has held a commanding position in this space, largely through its Xeon processor line and a suite of hardware accelerators specifically tuned for telecom workloads. The company’s FlexRAN reference software platform became something of an industry standard for vRAN deployments. But AMD’s Sorano chips appear designed to challenge that position directly. As TechRadar reported, the Sorano lineup will include models with 84, 64, 48, 32, and 16 cores, giving telecom equipment manufacturers a range of options from high-density central office deployments down to compact edge installations.
The Technical Specifications That Matter to Network Operators
What makes Sorano particularly interesting to telecom engineers is not simply the core count but the architectural choices AMD has made to optimize for network processing. The chips are expected to support DDR5 memory with high bandwidth configurations, PCIe Gen 5 connectivity for rapid data throughput to network interface cards and accelerators, and enhanced real-time processing capabilities that are essential for meeting the strict latency requirements of 5G signal processing.
In vRAN deployments, processors must handle Layer 1 (physical layer) signal processing tasks that are extraordinarily time-sensitive. A base station processing 5G New Radio signals has only microseconds to encode and decode data — any delay can degrade call quality or drop connections entirely. Intel addressed this challenge with built-in accelerators in its fourth and fifth-generation Xeon Scalable processors, including dedicated vRAN Boost technology. AMD’s approach with Sorano appears to rely on a combination of raw core performance from the Zen 5 architecture and tight integration with external accelerators, though full technical details on any on-die acceleration features have not yet been publicly confirmed.
Intel’s Grip on Telecom Is Loosening at a Critical Moment
The timing of AMD’s Sorano push could hardly be more strategically significant. Intel has been facing considerable headwinds across its business, including manufacturing delays, leadership transitions, and intensifying competition in every segment from PCs to data centers. In the telecom-specific market, Intel’s position has been further complicated by the slow pace of Open RAN adoption globally. While major operators like Vodafone, Deutsche Telekom, and Rakuten have committed to Open RAN strategies, the broader industry has moved more cautiously than early projections suggested, stretching out the timeline for large-scale commercial deployments.
This slower-than-expected rollout has, paradoxically, created an opening for AMD. Many operators and equipment vendors are still in the evaluation and testing phase for their next-generation network infrastructure. By arriving with a competitive silicon offering before the market fully commits to its next hardware cycle, AMD has a realistic window to win design slots that might have defaulted to Intel two or three years ago. The fact that AMD’s EPYC processors have already gained significant traction in the broader data center market — taking meaningful share from Intel in cloud computing and enterprise servers — gives the company credibility with the procurement teams that will be making these decisions.
The Competitive Dynamics Extend Beyond x86
AMD and Intel are not the only companies vying for telecom processor sockets. Arm-based chip designs from companies like Ampere Computing, as well as custom silicon efforts from major cloud providers such as Amazon Web Services (with its Graviton processors) and Google, are also making inroads into network infrastructure. Qualcomm, with its deep expertise in wireless technology, has been developing its own infrastructure processors aimed at the base station market. And Nvidia, through its acquisition of networking assets and its GPU-accelerated computing platforms, has positioned itself as a provider of AI-enhanced network optimization tools that sit alongside — or potentially replace — traditional CPU-centric architectures.
Against this backdrop, AMD’s Sorano strategy appears to be a bet that the x86 instruction set architecture still has significant advantages in telecom workloads, particularly when it comes to software compatibility. Decades of telecom software — from protocol stacks to network management tools — have been written for x86 platforms. Migrating that software to Arm or other architectures involves non-trivial engineering effort and validation costs. By offering a high-performance x86 alternative to Intel, AMD can position itself as a lower-risk option for operators who want competitive pricing and performance without the disruption of an architecture change.
What the Core Count Arms Race Means for Deployment Economics
The 84-core top-end configuration of the Sorano lineup has implications that go beyond raw performance benchmarks. In telecom deployments, physical space and power consumption are often the binding constraints. A cell tower site or a small edge data center may have limited rack space and a fixed power budget. A processor that can handle more network functions per socket — or serve more simultaneous users per watt — directly translates into lower total cost of ownership for the operator.
AMD has consistently used core density as a competitive weapon against Intel in the data center market, and the same playbook applies here. If an 84-core Sorano chip can consolidate workloads that previously required two Intel Xeon sockets into a single AMD socket, the savings in hardware, power, cooling, and physical space compound rapidly across a nationwide network deployment involving thousands of sites. Telecom operators, facing enormous capital expenditure demands for 5G buildouts, are acutely sensitive to these economics.
The Road From Silicon to Commercial Deployment
Of course, having competitive silicon is necessary but not sufficient to win in the telecom market. AMD will need to build out a supporting infrastructure of software tools, reference designs, and ecosystem partnerships to convince telecom equipment manufacturers — companies like Ericsson, Nokia, Samsung, and a growing roster of Open RAN vendors — to qualify and adopt Sorano-based platforms. Intel spent years cultivating these relationships and investing in software optimization for its telecom-focused Xeon products. AMD will need to compress that timeline significantly.
Early indications suggest AMD is aware of this challenge. The company has been expanding its partnerships with network equipment providers and investing in software optimization for telecom workloads. The broader EPYC platform’s success in winning over initially skeptical enterprise and cloud customers suggests AMD has developed the organizational capability to execute this kind of market entry, though the telecom sector’s long qualification cycles and conservative procurement culture present distinct challenges.
A Market Inflection Point for Network Hardware
The arrival of AMD’s Sorano processors comes at a moment when the global telecommunications industry is making foundational decisions about the hardware platforms that will underpin wireless networks for the next decade. The choices made by operators and equipment vendors in the next 18 to 24 months — as 5G Advanced and early 6G research accelerate — will determine which chip architectures become entrenched in network infrastructure.
For AMD, Sorano represents more than an incremental product launch. It is a declaration that the company intends to compete across the full spectrum of high-performance computing, from cloud data centers to the wireless network edge. For Intel, it means defending yet another market segment against an increasingly capable and confident rival. And for the telecom industry itself, genuine competition between processor suppliers could drive down costs, accelerate innovation, and give operators more flexibility in how they design and deploy their networks. The stakes, measured in billions of dollars of infrastructure spending over the coming years, are difficult to overstate.
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